Synopsys DesignWare USB 1.1 Digital Controller IP Cores

China 简体中文 Japan 日本语 United States English
International Office Locations

By Design Phase


System-Level Design Signal processing algorithm design, high-level synthesis, virtual prototyping, mechatronics and wiring harness		Manufacturing Mask synthesis and data prep, lithography simulation and verification and yield management

Verification High-performance system, RTL, equivalence checking, and mixed-signal verification solutions		TCAD Process and device simulation solutions for technology development and manufacturing

Implementation & Sign-Off Advanced digital and custom IC and FPGA design solutions, including synthesis, physical implementation, test and sign-off		All Tools Directory of all Synopsys tools

Reduce Risk with High Quality IP


Interface IP Standard interfaces for SoC designs such as USB, PCIe, DDR, SATA, HDMI, MIPI and more		Logic Libraries SiWare Logic and ASAP Logic standard cell libraries for a wide array of applications and process technologies

Analog IP Analog IP such as audio codecs, data converters, touch screen controllers, video analog front-end, clock sources and sensors		Configurable Cores ARC cores, ARC Sound family, ARC Video family, configurable extensions and Sonic Focus enrichment software

Embedded Memories Embedded memory solutions including embedded SRAMs, embedded non-volatile memory and embedded test and repair		SoC Infrastructure IP DesignWare Library, minPower Components, verification IP, Integra on-chip communications, Integra memory controllers

Accelerate time from idea to implementation ready RTL


Algorithm Design & Analysis High performance, model-based signal processing algorithm design, and high level synthesis technology		Virtual Prototyping Software models of complete systems enabling early and concurrent development of hardware and software

Architecture Development Efficient exploration and optimization of system-level performance for SoC interconnect and memory subsystem architectures		FPGA-Based Prototyping Modular, high performance hardware solutions enabling at-speed hardware/software development, validation and debug

Processor Development Unified development of application-specific processors, programmable accelerators and software tool chain		Saber Behavioral design, modeling, and simulation for power electronics, multi-domain systems, and wire harnesses

Helping You Address Your Toughest Design Challenges


Tool and Methodology Adoption Take full advantage of the latest features and methodologies available in Synopsys' tools		Design Implementation Leverage tapeout-proven flows and project experience to get your chip done

SoC Design & Verification Achieve rapid design closure by applying best practices in system-level design, RTL creation, FPGA-based prototyping, and functional verification		Low Power Optimization Implement low power implementation and verification techniques to optimize your chip's power consumption

Design Flow Deployment Optimize your design flow to address the latest design challenges		Predictable Silicon Sign-Off Improve ASIC handoff with early optimization for physical effects

Solutions for Semiconductor and System Design


Eclypse Low Power Solution The perfect alignment of technology, methodology, IP, services, and industry standards to address advanced low power design		Discovery Verification Platform An integrated portfolio of functional, AMS, formal and low-power verification tools

Galaxy Implementation Platform A comprehensive solution for cell-based and custom IC implementation		Synplicity FPGA Design Solution Comprehensive toolsets, methodologies, and services to address FPGA design requirements

Industry Solutions Tailored solutions for automotive, memory, mil/aero, mobile devices & end-product categories		Lynx Design System A highly integrated, production-ready IC development platform

Expert Training and Support Services


Training Training courses on Synopsys� tools and methodologies		Global Support Centers Open a support issue online

SolvNet Get instant online access to the self-help support resources you need		Licensing, Installation & Compute Platforms The latest information about how to install, upgrade and manage your Synopsys licenses

Explore, Interact and Collaborate


Synopsys Users Group (SNUG) Technology users and product experts exchange ideas at SNUG conferences		University Program Resources for teaching IC design: how to apply to our program, curriculum, articles, support and training, and much more

Partners Collaborating to provide advanced reference flows, design kits, libraries, IP and methodology		Interoperability EDA tools working together for customer satisfaction and success

Blogs & Forums Insights from the experts, open forums for global Synopsys community		Conversation Central Join us the third Thursday of each month to join the conversation!

Synopsys: Innovation and Beyond


About Synopsys Discover our company, our management team and our values		Synopsys Careers Learn about jobs, internships and our commitment to diversity

News Room Read Synopsys news, contact the PR team, download an image, or gather other information		Events Meet with Synopsys at an industry event, participate at a SNUG® conference , or attend a Synopsys workshop or seminar

Investor Relations Browse information for shareholders, analysts and potential investors		Community Involvement Learn how Synopsys inspires the next generation of technologists

HOME

IP

INTERFACE AND STANDARDS IP

USB

SYNOPSYS DESIGNWARE USB 1.1 DIGITAL CONTROLLER IP CORES

Synopsys DesignWare USB 1.1 Digital Controller IP Cores

Search Tools

Analog IP Selector

Spotlight

The high-quality, silicon-proven Synopsys DesignWare� USB 1.1 Controller IP solution enables designers to implement a host controller, device and/or hub into their SoC designs. By utilizing the compliant DesignWare USB 1.1 Controller IP solution, designers can leverage these solutions to significantly reduce development time and engineering risk while bringing their USB-based products to market faster. The USB 1.1 Controllers consist of the USB 1.1 Host, Device, and Hub.

The DesignWare USB IP is the most certified IP solution in the industry. With over 2,000 design wins and hundreds of millions of silicon-proven units shipped, Synopsys' complete USB IP solution, consisting of digital controllers, PHY and Verification IP, enables designers to lower integration risk and speed time-to-market.

DesignWare USB 1.1 Hub Controller Datasheet
DesignWare USB 1.1 OHCI Host Controller Datasheet

Highlights
Products
Downloads and Documentation

Silicon-proven
USB 1.1 compliant
Lowest gate count, lowest area
Optimized power management
Supports low- and full-speed devices

USB 1.1 Device Controller Core w/Native Interface	STARs	Subscribe
USB 1.1. Hub Controller Core	STARs	Subscribe
USB 1.1 OHCI Host Controller Core w/AHB Interface	STARs	Subscribe

Description	USB 1.1 Device Controller Core w/Native Interface
Name	dwc_usb_1_1_device-native
Version	2.30a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores DWC USB 1.1 Device Native Databook Doc Overview DesignWare Cores DWC USB 1.1 Document Introduction Evaluation Databook DesignWare Cores DWC USB 1.1 Device Native Evaluation Databook Installation Guide DesignWare Cores DWC USB 1.1 Device Install Guide Release Notes DesignWare Cores DWC USB 1.1 Device Native Release Note
Download	dwc_usb_1_1_device-native

Description	USB 1.1 OHCI Host Controller Core w/AHB Interface
Name	dwc_usb_1_1_ohci_host-ahb
Version	2.70a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores USB 1.1 OHCI Host Controller Family Databook Datasheet DesignWare USB 1.1 OHCI Host Controller Datasheet Evaluation Databook DesignWare Cores USB 1.1 OHCI Host Controller Family Evaluation Databook Installation Guide DesignWare Cores USB 1.1 OHCI Host Controller Family Install Guide Release Notes DesignWare Cores USB 1.1 OHCI Host Controller Release Notes
Download	dwc_usb_1_1_ohci_host-ahb

Description	USB 1.1. Hub Controller Core
Name	dwc_usb_1_1_hub-native
Version	2.20a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DESIGNWARE CORES USB 1.1 HUB DATABOOK Datasheet DesignWare USB 1.1 Hub Controller Datasheet Doc Overview DESIGNWARE CORES USB 1.1 HUB DOC INTRODUCTION Evaluation Databook DESIGNWARE CORES USB 1.1 HUB EVALUATION DATABOOK Release Notes DESIGNWARE CORES USB 1.1 HUB RELEASE NOTE
Download	dwc_usb_1_1_hub-native

© 2010 Synopsys, Inc. All Rights Reserved.