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The Synopsys USB On-The-Go (OTG) Verification IP (VIP), included in the DesignWare® Library and the VCS Verification Library, provides a quick and efficient way to verify USB-based SoC designs. The VIP supports all USB Interfaces-USB 1.1, USB 2.0, USB OTG, USB Transceiver Macrocell Interface (UTMI), USB OTG Transceiver Macrocell Interface Plus (UTMI+) and UTMI+ Low Pin Interface (ULPI) and High Speed Interchip (HSIC). USB OTG offers the flexibility of configuring the model as a host or a dual role device. The model can be operated at high speed (480 Mbits/sec), full speed (12 Mbits/sec) or low speed (1.5 Mbits/sec) data transfer rates. The Verification IP is available in the DesignWare Library and DesignWare Verification Library. DesignWare USB Complete Solution Datasheet
DesignWare USB Verification IP Datasheet
- Compatible w ith: USB 1.1, USB 2.0, USB OTG
- Supports UTMI, UTMI+ and ULPI specification
- Support HSIC Interface for Chip-to-Chip on PCB USB
- Supports Link Power Management (LPM)
- Multiple testbench and language interfaces
- SystemVerilog, Vera®, Verilog, VHDL
- Supports SRP and HNP compliance checking
- Operates at high, full or low speed
- Protocol checking and transaction logging
- Programmable error injection and detection
- Native Testbench (NTB) support
- Reference Verification Methodology (RVM) support
- Verification Methdology Manual (VMM) support
- Includes protocol-based scenario generation
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