About a year ago, Synopsys announced a corporate initiative to take advantage of multicore processor technology across its broad tool portfolio. On the verification front, the first tool out of the multicore gate was HSPICE, with impressive performance gains.
Tom Borgstrom

In SystemVerilog, unlike C, you don’t have to explictly free dynamically allocated class instances. Like most modern programming languages, SystemVerilog includes a garbage collector that frees memory that is no longer needed.
Janick Bergeron

Based on my interactions with many designers for the past few years, most common techniques in practice/proven today are
Godwin Maben

Hello, everyone interested in EDA interoperability and fans of The Standards Game. I’d like to invite you to join me at the 21st Synopsys EDA Interoperability Forum, sponsored by Sun Microsystems.
Karen Bartleson

Observations and views from 3 of Synopsys’ top AMS/custom design technologists.
Fred Sendig, Kishore Singhal, Bob Lefferts