Overview
During this half-day you will learn how the CHIPit Rapid Prototyping Plus platforms can be used for functional verification and validation throughout the entire SoC and ASIC design and verification process. Through the support of various verification modes, like transaction based verification, co-simulation or system prototyping the CHIPit solutions provide design engineers with unprecedented productivity and flexibility to verify chip implementation and system functionality.

In the seminar we will demonstrate the advanced use modes of CHIPit systems and their potential use with other verification environments, including links to virtual models via the SCE-MI 2.0 transaction-based interface and the VCS simulator.

Who should Attend
ASIC/ASSP/SoC Hardware Designers, Verification Engineers, System Architects, R&D and Engineering Management

Agenda

• CHIPit Rapid Prototyping Plus Overview
• Flexible, Advanced Verification Modes
• Co-Simulation with VCS and CHIPit
• SCE-MI Compliant Transaction-Based Verification
• Advanced Debug Capabilities
• System Prototyping (Virtual Prototyping + Hardware Prototyping)

Please bookmark this site and check back often as it will be updated as seminar details and registration information become available.