Synopsys offers powerful tools that address the need for equivalence checking of large, complex SoCs, all types of memories, full custom logic and I/Os. With unique and patented technologies, including Hier-IQ, datapath targeted solvers and symbolic simulation, users obtain the most comprehensive equivalence coverage available. The Synopsys formal equivalence checking suite includes Formality for complete synthesis-flow verification and ESP-CV for full-custom, memory verification. Formality and ESP offer leading performance, are easy-to-use and combine to provide full-chip, RTL-to-transistor coverage.