The ability of CustomSim to co-simulate with Synopsys’ VCS digital simulator opens up the possibility of a “best of both worlds” approach enabling the majority of the chip to be simulated in the digital domain while the FastSPICE tool handles the analog blocks. Using this mixed-signal approach, many techniques and philosophies that are common in the digital world can be applied to the verification of mixed-signal systems.
Andy Milne, Application Consultant, Synopsys, Inc.; Damian Roberts, Application Consultant, Synopsys, Inc.

The next-generation Rapid3D technology in StarRC Custom provides an integrated 3D extraction solution to address these growing accuracy, performance, capacity and ease-of-use needs. This paper presents the new Rapid3D technology and the benefits it provides for a range of target applications, including IP characterization as well as custom analog/mixed-signal (AMS), high-speed digital and memory array designs.
Omar Shah CAE, Synopsys Inc. Mathew Koshy R&D Manager, Synopsys Inc.

Today’s advanced process technologies and faster time-to-market schedules are pushing the limits of verification tools. Post-layout simulation runtimes are increasing 2-4x with every new process generation as chip transistor counts double and new parasitic effects come into play. The Synopsys StarRC™ extraction solution offers a wide range of features to boost the simulation performance and capacity of transistor-level custom digital, analog/mixed-signal and memory designs.
Omar Shah, Corporate Application Engineer; Shekhar Kapoor, Marketing Manager

Consider the number of checks that an IC design team has to go through before tape-out. In each company, chip failures ultimately translate into additional checks in the sign-off flow. Technology and design trends are responsible for further increasing the number of checks.
Bradley Geden Product Marketing Manager, AMS Circuit Simulation, Synopsys, Inc.