Videos 


DAC 2009: IC Compiler Ecosystem

IC Compiler, a cornerstone of the Galaxy™ Implementation Platform, is today’s leading physical implementation solution. IC designers worldwide have standardized on IC Compiler and are using it to tape out their most challenging designs.
John Chilton, Emcee, Sr. VP of Marketing & Corporate Development, Synopsys -- Antun Domic, Sr. VP and General Manager of the Implementation Business Unit, Synopsys -- Tadahiko Yamamoto, Chief Specialist, Design Methodology Development Group, Toshiba -- Giuseppe Fornaciari, Design Center Manager, CCI-CSD, STMicroelectronics -- Harpreet Gill Sr. Engineering Manager, System LSI SoC R&D, Samsung Electronics -- Steven Yang, Director, Design Engineering, Aquantia -- Genichi Tanaka Sr. Engineer, Renesas


IC Compiler Customer Successes

In March 2009, SNUG (Synopsys User Group) San Jose drew a large crowd of Synopsys users who gathered to hear from others about their experiences presented in papers, tutorials, and panels. The videos below provide you with a brief overview from customers who presented at San Jose SNUG. Visit the SNUG website for a complete list of IC Compiler papers and presentations. This DAC 2008 event provided an opportunity for members of the electronic design community to learn more about customer design successes with IC Compiler. The event drew a capacity crowd as guest speakers from ARM, Intel, STMicroelectronics, Texas Instruments, and Toshiba shared their experiences from a variety of high-end designs utilizing the latest technology advances in IC Compiler: Concurrent Hierarchical Design, MinChip technology, DFM and IC Compiler’s new Zroute routing technology.
Philip Watson, Implementation Environment Program Manager; Raj Varada, Principal Engineer; Naveen Raina, Technical Specialist & Mutsunori Igarashi, Chief Specialist, Design Methodology Development.



Zroute: New Routing Technology in IC Compiler

Architected from the ground up, new Zroute technology offers 10X speed-up, higher QoR, and better manufacturability. Stephen Meier, vice president of Engineering for Synopsys' Implementation Group , shared more details during the DAC 2008 IC Compiler Luncheon event.
Stephen Meier, vice president of Engineering for Synopsys' Implementation Group



10X Faster Routing Runtime

Combine advanced routing algorithms with multi-threading technology, and you get a speed increase of >10X on quad-core machines.
Tong Gao, Synopsys Scientist and architect of Zroute




NewsArticlesWhite PapersWebinarsVideos