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Multi-Gigabit Signal Integrity Analysis with HSPICE
Learn about HSPICE capabilities for modeling high-frequency channel components, and high-performance simulation and analysis features for characterizing multi-gigabit links.
Scott Wedge, Ph.D, Sr. Staff Engineer, Synopsys
Aug 18, 2010 | | | Find Electrical Violations Before Tapeout with CustomSim Circuit Check
Learn how customers are using CustomSim Circuit Check to analyze designs with hundreds of millions of transistors to catch electrical violations before tapeout.
Bradley Geden, Product Marketing Manager, Synopsys
Jul 21, 2010 | | | Fastest Time to Tapeout with IC Validator
Learn about IC Validator flows and features, including advanced layout parameter extraction with StarRC, interactive LVS Shortfinder and Blackbox LVS to enable faster design convergence.
Kerstin McKay, CAE Director, Synopsys
Jun 09, 2010 | | | Eliminating Late-Stage DRC Surprises with In-Design Physical Verification
Third in the In-Design technology series featuring several high productivity in-design physical verification flows with IC Validator, including Automatic DRC Repair and Pre-Routing Verification – all from within IC Compiler.
Kerstin McKay, CAE Director, Physical Verification, Synopsys
May 05, 2010 | | | Shaping the Perfect Audio Codec: How Your SoC Can Benefit from the Right Audio Functions’ Line-Ups
In this webinar, you will get an overview of a wide range of audio functions that can be optimized for low power consumption and small silicon area such as volume control, high isolation inputs, crosstalk, headset drivers, Class-G, pop-noise suppression and clock management. You will also learn how to select the right analog audio block lineups for different types of applications, and you will understand how Synopsys’ high-quality DesignWare Audio IP solutions can deliver performance levels at par with those from discrete components
João Risques, Product Marketing Manager , Synopsys
Apr 13, 2010 | | | Addressing 32/28 Nanometer Design Challenges
The second webinar in a series highlighting 32/28nm design challenges and the solutions available in IC Compiler and the Synopsys Galaxy Implementation platform to address these challenges. Learn about advanced technologies in core areas that address both the effects of nanometer processes as well as exploding design complexity to get the best QoR, faster design closure and reduced cost of design.
JC Lin, VP Engineering, Synopsys; Ashwini Mulgaonkar, Director Marketing, Synopsys
Apr 08, 2010 | | | Verify Digitally-Assisted Analog Circuits with CustomSim Fast Transient Analysis
Learn how the CustomSim high-capacity, fast transient analysis solution can help you increase design confidence and reduce project development time.
Bradley Geden, Product Marketing Manager, Synopsys; Tom Hsieh, AMS CAE, Synopsys
Mar 25, 2010 | | | Custom Designer: Advances in Custom Layout Automation with SmartDRD
SmartDRD technology visualizes, prevents and automatically fixes DRC violations to help designers quickly achieve DRC clean designs with significantly reduced effort.
Marc Swinnen, Sr. Product Marketing Manager, Synopsys; Christopher Shaw, Technical Marketing Manager, Synopsys
Mar 23, 2010 | | | StarRC Custom Extraction for Custom IC Design
Learn how StarRC Custom enables high accuracy and optimized extraction for improved simulation throughput. Demonstrations include a 3-D field solver, context-specific MOS device parasitic extraction, CustomSim simulation efficiency links and OpenAccess-based integration with Custom Designer.
Baribrata Biswas, Group Director, R&D / Extraction , Synopsys; Omar Shah, CAE / Extraction, Synopsys
Nov 11, 2009 | | | HSPICE/Custom Designer for Analog & RF Circuit Design
Analog/RF design solution helps meet design challenges
Christopher Labrecque, HSPICE Marketing Manager, Synopsys; Fredrik Ivarsson, Custom Design Corporate Applications Engineer, Synopsys
Nov 05, 2009 | | | Front-to-Back AMS Flow using Custom Designer
Follow the front-to-back development of an AMS block using Synopsys' Galaxy Custom Designer implementation solution.
Joe Mastroianni, VP of R&D, Les Spruiell, Product Marketing Manager, Synopsys; Chris Shaw, Technical Marketing Manager, Synopsys
Nov 03, 2009 | | |
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