The process flow represents a generic 90 nm technology node and is intended to serve as a convenient starting point for any deep submicron CMOS simulation project.

This Sentaurus TCAD simulation project provides a template setup for farsubmicron CMOS device characterization. IdVgs curves for a low drain bias and high drain bias are simulated for NMOS and PMOS structures with various gate lengths.

Compared to (100) substrates the hole mobility is much higher in MOSFETs fabricated on (110) or (111) substrates with conventional SiO2, as the highest piezoresistance coefficient is obtained on the (110) surface under compressive stress.

This application example shows the process simulation of a 30-nm gate-length NMOS flow in Sentaurus Process using a combined approach of both continuum (five-stream) and atomistic (kinetic Monte Carlo) diffusions.

Shallow junctions with low sheet resistance are required for future generation short channel devices.

This application note showcases the TCAD Sentaurus 3D simulation capabilites for a trench capacitor embedded 3D DRAM cell.

Modern semiconductor industry is facing numerous challenges as the next generation of devices are developed and manufactured.

This project demonstrates a transmission line pulse (TLP) simulation of a three-dimensional bipolar structure.

Synopsys TCAD offers an extensive array of physical models to simulate silicon-germanium devices at both process and device simulation levels, including extraction of key device performance parameters.

This Sentaurus TCAD simulation project provides a template setup for the characterization of bipolar transistors.

Silicon carbide (SiC) has long been recognized as a superior semiconductor for high-power and high-temperature applications in view of its high breakdown electric field and excellent thermal conductivity. Since the pioneering work of Tairov and Tsvetkov who developed the modified seed sublimation growth process that spearheaded today's SiC substrate technology, the industry has improved steadily the quality, size, and cost of SiC substrates, all of which are key manufacturability considerations in any semiconductor technology.

This Sentaurus TCAD simulation project provides a template setup for laterally diffused MOS (LDMOS) process simulations.

This Sentaurus TCAD simulation project provides a template setup for IGBT device characterization.

This Sentaurus TCAD simulation project provides a template setup for the simulation of silicon-carbide devices.

This Sentaurus TCAD project simulates the time-dependent switching characteristics of a light-triggered thyristor.

This Sentaurus TCAD project provides a template setup for the simulation of DC characteristics of GaN HFET devices.

The purpose of this Sentaurus TCAD simulation project is to provide a template setup for the DC and RF characterization of high electron mobility transistors (HEMTs).

This Sentaurus TCAD project provides a template for the simulation of the read/ write operation and the charge retention of a silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory device.

This Sentaurus TCAD template provides a simple example of a GaAs edge-emitting laser simulation.

This template demonstrates the use of the transfer matrix method (TMM) of TCAD Sentaurus for the calculation of solar cell characteristics: reflectance and transmittance spectra, quantum efficiency, and I-V curves.