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Dec 17, 2009X-FAB Now Supports Synopsys Galaxy Custom Designer
Synopsys, Inc., a world leader in software and IP for semiconductor design, verification and manufacturing, and X-FAB Silicon Foundries, the leading analog/mixed-signal foundry, today announced that X-FAB has expanded its support to include Synopsys’ Galaxy Custom Designer™ implementation solution.

Nov 16, 2009Digital Imaging Systems Achieves First-pass Silicon Success with Synopsys Galaxy Custom Designer
Demanding AMS Project Design and Tapeout Schedule Met in 22 Days

Sep 01, 2009Ubixum Achieves Product-Ready Design at First Silicon with Synopsys Galaxy Custom Designer Solution
Synopsys, Inc. today announced that Ubixum has used Synopsys' Galaxy Custom Designer™ implementation solution to successfully design its latest advanced image sensor chip.

Jul 24, 2009Synopsys Introduces Galaxy Constraint Analyzer to Improve Designer Productivity
Speeds RTL-to-GDSII Turnaround Time Through Look-ahead Constraint Analysis

Jul 20, 2009Synopsys Introduces IC Compiler In-Design Rail Analysis to Accelerate Design Closure
Synopsys, Inc., today introduced its In-Design Rail Analysis™ capability to accelerate design closure. Part of Synopsys' IC Compiler in-design ecosystem, In-Design Rail Analysis utilizes embedded PrimeRail analysis and fixing guidance technology to enable designers to easily perform power network verification throughout physical implementation.

Jun 09, 2009TSMC Selects Synopsys Galaxy Implementation Platform for Integrated Sign-off Flow
Synopsys, Inc., a world leader in software and IP for semiconductor design and manufacturing, today announced that TSMC selected Synopsys' Galaxy™ Implementation Platform for their new Integrated Sign-Off Flow. The RTL-to-GDSII design flow deploys the advanced optimization technologies of Synopsys' Design Compiler® synthesis and IC Compiler physical implementation solutions, and the PrimeTime® sign-off and Star-RCXT™ extraction solutions - the industry yardsticks for IC design sign-off. The new flow is now available for 65-nanometer (nm) designs with planned extensions into other process technology nodes.

Jun 02, 2009SMIC Deploys Synopsys HSPICE Simulator for 45-nm Physical IP and Standard Cell Development
HSPICE 2009.03 Delivers 2x Speed-up and Improved Silicon Correlation

May 14, 2009Synopsys PrimeTime PX Power Analysis Solution Achieves Broad Market Adoption
Synopsys, Inc., today announced that Synopsys’ PrimeTime® PX solution, a key component of the Galaxy™ Implementation Platform and part of Synopsys’ Eclypse™ low power solution, has been successfully deployed at more than 175 semiconductor companies worldwide to perform highly accurate dynamic and leakage power analysis. Seamless integration within PrimeTime, the golden industry standard for timing and signal integrity signoff, has resulted in the selection of PrimeTime PX as the preferred power analysis solution at companies from all facets of the semiconductor industry.

May 13, 2009MediaTek Adopts Synopsys PrimeTime SI for Timing and Signal Integrity Signoff
Synopsys, Inc., a world leader in software and IP for semiconductor design and manufacturing, today announced that MediaTek Inc., a leading fabless semiconductor company for wireless communications and digital multi-media solutions, has adopted Synopsys’ PrimeTime® SI solution for static timing analysis (STA) and signal integrity (SI) signoff. MediaTek selected the Synopsys PrimeTime SI solution to streamline the signoff flow for its new cutting-edge system-on-chip (SoC) designs targeted at 65-nanometer (nm) and below process technologies.

Apr 14, 2009Synopsys PrimeTime Advanced On-chip Variation Analysis Enables Renesas to Accelerate Timing Closure at 65-nm and Below
Synopsys, Inc. today announced that Renesas Technology Corp. has deployed Synopsys' PrimeTime® advanced on-chip variation (OCV) capability to help accelerate timing closure for 65-nanometer (nm) and below system-on-chip (SoC) designs. PrimeTime advanced OCV analysis is an efficient, easy-to-adopt solution that employs adaptive derating to accurately account for random and systematic process variations across an integrated circuit (IC).

Nov 03, 2008Ubixum Adopts Synopsys Galaxy Custom Designer Mixed-Signal Implementation Solution
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that Ubixum has adopted Synopsys' Galaxy Custom Designer™ solution, the industry's first modern-era mixed-signal implementation solution.

Sep 22, 2008Synopsys Unveils Galaxy Custom Designer
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today unveiled its Galaxy Custom Designer solution, the industry's first modern-era mixed-signal implementation solution.

Jun 03, 2008MediaTek Achieves Faster Time-to-Tapeout with IC Compiler
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that MediaTek, Inc., a leading semiconductor company for wireless communications and digital media solutions, has adopted Synopsys' IC Compiler for its next-generation, high-performance 65-nanometer (nm) system-on-chip (SoC) designs.

Jun 02, 2008Oticon Tapes Out Innovative Hearing-Aid DSP Using Synopsys IC Compiler
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that Oticon has taped out part of its next-generation digital signal processor (DSP) chipset for hearing-aid devices using Synopsys' IC Compiler design planning and place-and-route product, which is part of the Eclypse Low Power Solution.

May 31, 2008Synopsys Extends Design Compiler Topographical Technology to Predict and Alleviate Routing Congestion
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today unveiled its new Design Compiler® Graphical synthesis product that shortens implementation time for system-on-chip (SoC) devices by helping RTL designers avoid wire-routing congestion problems that typically occur during detailed route.

May 17, 2008Synopsys IC Compiler Routing Qualifies for TSMC's 45-Nanometer Process
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the qualification and immediate availability of Synopsys' IC Compiler for designs targeting TSMC's latest 45-nanometer (nm) process.

Mar 10, 2008Synopsys Announces Multi-Core Initiative to Accelerate Design Time-To-Results
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced its multi-core initiative to deploy advanced parallel, threaded and other optimized compute technologies across its Discovery™ Verification and Galaxy™ Design platforms, and Design for Manufacturing (DFM) solutions.

Feb 26, 2008Synopsys Introduces Industry's First Concurrent Hierarchical Design System With Latest IC Compiler Release
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the availability of the industry's first concurrent hierarchical design system as part of the IC Compiler 2007.12 release. As designers migrate to smaller geometries, on-chip integration increases and design sizes mushroom, making hierarchical design almost mandatory.

Jan 21, 2008Synopsys IC Compiler Successfully Employed by Matsushita for First 45-nm SoC Design Tapeout
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that IC Compiler was used in a 45-nanometer (nm) system-on-chip (SoC) device of which Matsushita Electric Industrial Co., Ltd., the consumer electronics company behind the globally recognized Panasonic brand, has completed the tapeout, and which is entering volume production.

Apr 17, 2007Synopsys Design Compiler 2007 Boosts Designer Productivity and IC Performance
Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced availability of the latest release of its Design Compiler® synthesis solution, Design Compiler 2007.

Apr 17, 2007IC Compiler 2007 Release Continues Technology Innovation
Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced the 2007.03 release of IC Compiler, Synopsys' next-generation place-and-route solution.

Mar 29, 2007Synopsys Accelerates Low-power Designs with Comprehensive Implementation and Verification Solution
Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced that it is enhancing its comprehensive low-power verification and implementation solution to ensure compliance with the widely supported Unified Power Format (UPF) 1.0 Accellera standard.

Mar 27, 2007Synopsys Enables STMicroelectronics to Achieve First-Silicon Success for 65-nm Dual High-Definition MPEG-4 Decoder
Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced that it has enabled STMicroelectronics to achieve first-silicon success for its new STi7200 dual-video-stream high-definition (HD) decoder, aiming to serve a broad range of digital consumer applications including set-top boxes, high-definition DVDs (dual-standard Blu-ray and HD-DVD) and digital TVs.

Nov 20, 2006Wolfson Selects Synopsys Galaxy and Discovery Platforms and DesignWare IP for Analog Mixed-signal Designs
Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced that Wolfson Microelectronics plc, a global leader in high-performance mixed-signal chips for the digital market, has selected Synopsys' Galaxy™ Design and Discovery™ Verification Platforms, as well as Synopsys' DesignWare® Library intellectual property (IP), for the design and verification of Wolfson's high-performance analog mixed-signal (AMS) integrated circuits (ICs).




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