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LOW POWER WEBINAR
Low Power Architecture Exploration for ASIC Algorithm Implementation
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Pain Management in Power Optimization
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Hybrid Techniques Reduce Dynamic Power Consumption
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Fundamentals of Low Power IC Design
Low Power Design Community
An Inside Look At Transaction-Level Power Modeling
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Making IP Tradeoffs For Power
A Shock To The System
Experts At The Table: Verification Nightmares
Have You Really Verified Your Multi-rail, Low Power Design?
Experts At The Table: Low-Power Management and Verification
Low-Power Design Portal Serializes VMM-LP Chapters
Verifying Low Power Designs
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Absolute Power
Magic Blue Smoke
The Standards Game
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White Papers
Hybrid Techniques Reduce Dynamic Power Consumption
Pain Management in Power Optimization: Best Practices for Reducing Power, Improving Productivity and Getting SoCs out the Door on Time and on Budget
Testing Low Power Designs with Power Aware Test
Realizing Low Power IC Design: It Starts with the Clock Tree
Synopsys Eclypse Low Power Solution
Eclypse Low Power Solution: Clock Tree Synthesis
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Technical Papers
Formal Methods to Verify the Power Manager for an Embedded Multiprocessor Cluster
Power Correlation with Silicon - A PrimeTime PX Evaluation
Reusable UPF for Multi-Voltage Design & Handling Analog Macros in Power Subsystem
LeSa Lowers Leakage
Clock Power Reduction-Analysis Metrics and Power Reduction Techniques
Low Power Verification with MVRC on a Hierarchical UPF Design
The Advent of UPF
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Presentations
SNUG San Jose 2010: Power Correlation with Silicon - A PrimeTime PX Evaluation
SNUG San Jose 2010: Formal Methods to Verify the Power Manager for an Embedded Multiprocessor Cluster
SNUG San Jose 2010: Reusable UPF for Multi-Voltage Design & Handling Analog Macros in Power Subsystem
SNUG San Jose 2010: LeSa Lowers Leakage
SNUG San Jose 2010: Clock Power Reduction-Analysis Metrics and Power Reduction Techniques
SNUG Munich 2010: Low Power Verification with MVRC on a Hierarchical UPF Design
SNUG Munich 2010: The Advent of UPF
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Webinars
Power Analysis using PrimeTime PX
Static Verification for Low Power Design
Low Power Algorithm Exploration
Efficient & Accurate Memory Timing & Power Analysis
Fundamentals of Low Power IC Design
Low Power Verification
Verifying Low Power Designs
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Mike Keating: The Future of Low Power
Godwin Maben: Low Power Trends and Methodology
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