Synopsys, Inc. today announced that Fujitsu Microelectronics Limited (FML) has deployed Synopsys' Galaxy™ Implementation Platform, for use with its low power digital electronics and mobile application ICs (integrated circuits). Fujitsu Microelectronics engineers used IEEE 1801 (UPF) to describe the power intent and drive the design, static verification and sign-off of several low power designs.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the availability of the DesignWare® SATA Device IP, for use in applications such as solid state drives, hard disk drives and optical disk drives. Additionally, Synopsys' comprehensive, silicon-proven DesignWare SATA IP solution consisting of Device, Host, PHY IP in 90 nanometer (nm) and 65nm processes, and Verification IP (VIP) has passed the SATA-IO Building Block interoperability testing, demonstrating full SATA functionality from a single vendor.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that Euphonic Technologies has achieved first-pass silicon success for its high-performance EGC601 Embedded Graphics Controller system-on-chip (SoC) utilizing Synopsys' DesignWare® IP for PCI Express.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, and UMC (NYSE: UMC)(TSE: 2303), a world-leading semiconductor foundry, today announced the release of a low power design reference flow supporting UMC's 65-nanometer (nm) technology.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the availability of its RTL-to-GDSII low power reference design flow for the 45-nanometer (nm) Common Platform™ technology offering from IBM, Chartered Semiconductor Manufacturing Ltd. and Samsung Electronics Co., Ltd.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that it is delivering comprehensive support for TSMC Reference Flow 9.0 targeting 40-nanometer (nm) processes, including 40G and 40LP.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that it has collaborated with ARM and Renesas Technology to define the industry's first methodology to address the rapidly increasing complexity of low power verification.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that Oticon has taped out part of its next-generation digital signal processor (DSP) chipset for hearing-aid devices using Synopsys' IC Compiler design planning and place-and-route product, which is part of the Eclypse™ Low Power Solution.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the Synopsys Eclypse™ Low Power Solution, the industry's most comprehensive suite of proven system-level, verification, implementation and signoff tools, intellectual property (IP), methodologies and services for low power chip development.

Magma Design Automation Inc. (NASDAQ: LAVA), Mentor Graphics Corporation (NASDAQ: MENT) and Synopsys, Inc. (NASDAQ: SNPS) announced today that the three companies are now delivering low power EDA tools based on the Accellera-developed Unified Power Format standard, UPF 1.0.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced it has extended low power management capabilities in the Synopsys Galaxy™ test solution to significantly reduce the time and effort needed to generate high-quality, power-aware manufacturing tests for integrated circuits (ICs).

Springer Science+Business Media, LLC today announced the publication of the “Low Power Methodology Manual for System-on-Chip Design” (LPMM), a comprehensive and practical guide to managing both static (leakage) and dynamic power in system-on-chip (SoC) designs, critical to designers using 90-nanometer and below technology.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software and ARM (LSE: ARM); (NASDAQ: ARMHY), today announced an enhanced implementation Reference Methodology (iRM) for the ARM1176JZF-S™ synthesizable microprocessor that supports a wide array of aggressive power-management techniques.

Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced that its 19th electronic design automation (EDA) Interoperability Developers' Forum will be held on Thursday, April 26th in Santa Clara, Calif.

Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced availability of the latest release of its Design Compiler® synthesis solution, Design Compiler 2007. The new release extends topographical technology to accelerate design closure for designs utilizing advanced low-power and test techniques, boosting designers productivity and IC performance.

Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced that it is enhancing its comprehensive low-power verification and implementation solution to ensure compliance with the widely supported Unified Power Format (UPF) 1.0 Accellera standard.

Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced that the Semiconductor Technology Academic Research Center (STARC) has deployed Synopsys Design Compiler® topographical technology in its 65-nanometer (nm) Synopsys Galaxy™ Design Platform-based design flow (project name: Eagle Flow) in the STARCAD®-CEL methodology.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Cypress Semiconductor Corp. has successfully taped out its West Bridge™ Antioch™ peripheral controller multimedia 3G/3.5G mobile phone integrated circuit (IC) using the Synopsys Galaxy™ design platform RTL-to-GDSII low-power solution, including the PrimeRail dynamic power network analysis solution.

Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced that the 18th electronic design automation (EDA) Interoperability Developers' Forum will be held on November 9, 2006 in Santa Clara, CA

Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced that Exar Corporation (Nasdaq: EXAR), a leading provider of high-performance, mixed-signal silicon solutions for the worldwide communications infrastructure, has standardized on Synopsys' JupiterXT™ design planner with Power Network Synthesis (PNS) capabilities to improve its power implementation flow.

Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software and ARM [(LSE:ARM); (Nasdaq:ARMHY)], today announced that the ARM® Advantage™ , Metro™ and SAGE-X™ standard cell libraries, part of its Artisan® physical IP family, now support the next-generation signal integrity signoff models based on Liberty™ Composite Current Source (CCS) modeling technology.

Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced that it has donated power management technology to Accellera, the Electronic Design Automation (EDA) organization focused on electronic design automation standards.

Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced that ARM, DSP Group Inc., Freescale, Infineon Technologies AG, Matsushita Electric Industrial Co., Ltd., Realtek Semiconductor Corp., Samsung, STMicroelectronics, Toshiba, UMC and others have successfully taped out more than 15 multi-voltage designs with Synopsys' Galaxy™ design platform RTL-to-GDSII advanced low-power solution.

Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, and Taiwan Semiconductor Manufacturing Company (NYSE: TSM) - the world largest semiconductor foundry, today announced Synopsys' Galaxy™ design and DFM platforms support in TSMC's Reference Flow 7.0.