| Jan 25, 2012 | Synopsys Collaborates with Sigrity to Accelerate Signal Integrity Analysis
Combination of HSPICE and Sigrity Solution Delivers Up to 3X Speed-up for SI Analysis
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| Oct 25, 2011 | eSilicon Selects Synopsys' Custom IC Design Solution and Tapes Out 28-nm Designs
Comprehensive Solution Enables Rapid Ramp-up and Delivery of Advanced Custom IP
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| Sep 26, 2011 | Synopsys Delivers Unified Solution for Digital and Custom SoC Designs
STMicroelectronics Reports 2X Productivity Advantage Over Existing ECO Flow with the Integration of IC Compiler and Galaxy Custom Designer
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| Jul 11, 2011 | Synopsys Announces Milestone in 20-nm Collaboration with Samsung Electronics
Samsung successfully tapes out first 20-nm test chip using IC Compiler and In-Design Physical Verification with IC Validator
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| Jul 11, 2011 | Synopsys and GLOBALFOUNDRIES Collaborate to Deliver 65nm iPDKs
Synopsys and GLOBALFOUNDRIES Collaborate to Deliver Interoperable Process Design Kits (iPDKs)
Synopsys Custom Design Solution Now Supported by GLOBALFOUNDRIES 65nm Process Technologies
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| Jun 13, 2011 | Synopsys Custom Design Solution Enables Moortec Semiconductor to Tape Out High-performance Analog IP
Unified Solution Streamlines Development of Embedded Temperature Sensor IP for 65nm, 40nm and 28nm Geometries
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| Jun 02, 2011 | Synopsys and TSMC Collaborate to Deliver Custom Design Solution for 28nm Analog/Mixed-Signal Reference Flow 2.0
Synopsys Galaxy Custom Designer Provides New Capabilities to Address Advanced Process Node Design Challenges
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| Jun 02, 2011 | Synopsys Collaborates with STMicroelectronics to Help Achieve Critical Milestone in 20-nm Design
ST Successfully Tapes Out First 20-nm Test Chip
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| May 26, 2011 | Synopsys Delivers 28-nm Design Solutions and Advanced System-Level Capabilities for TSMC Reference Flow 12.0
Flow provides optimized methodologies to shorten time-to-market and time-to-volume for designers using TSMC's 28-nanometer process technology
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| Apr 26, 2011 | Latest Innovations in Synopsys IC Compiler Deliver up to 40 Percent Power Reduction at HiSilicon
IC Compiler Widely Deployed In HiSilicon Production Design Flow
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| Jan 31, 2011 | Synopsys Galaxy Implementation Platform Addresses Gigascale Design
Latest Release Includes Scalability, Convergence and Throughput for Large IC Implementation on Advanced Node Technology
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| Sep 20, 2010 | New Synopsys HSPICE Precision Parallel Technology Delivers Up to 7X Speed-up for AMS Designs
HSPICE 2010 Advanced Analysis Features Provide a High-performance Analog Verification Solution
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| Aug 09, 2010 | Synopsys Galaxy Implementation Platform Used by TSMC for 28nm Process
Product Qualification Vehicle Test Chip Tapeout Includes Advanced Routing Rules, Low Power and Signoff Capabilities
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| Aug 05, 2010 | Synopsys Custom Design Tools Enable Creative Chips to Achieve First-pass Silicon Success
Unified Cell-Based and Custom Implementation Solution Key to Accelerating Time-to-Market
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| Jul 26, 2010 | Foveon Switches to Galaxy Custom Designer Solution to Accelerate Time-to-Tapeout
Synopsys Galaxy Custom Designer Enables First-pass Silicon Success on Foveon's Advanced Digital Sensor Product
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| Jun 10, 2010 | Samsung Achieves First-Pass 32nm Silicon Success Using Synopsys Galaxy Implementation Platform
Synopsys announced that Samsung Electronics' Foundry business (Samsung Foundry) has successfully taped out its first 32-nanometer (nm) system-on-chip (SoC) design using Synopsys' Galaxy™ Implementation Platform.
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| Jun 09, 2010 | Synopsys Delivers Comprehensive Custom Design Solution for TSMC Analog/Mixed-Signal Reference Flow 1.0
TSMC and Synopsys Collaborate to Validate Galaxy Custom Designer Solution with TSMC 28nm iPDK
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| Dec 17, 2009 | X-FAB Now Supports Synopsys Galaxy Custom Designer
Synopsys, Inc., a world leader in software and IP for semiconductor design, verification and manufacturing, and X-FAB Silicon Foundries, the leading analog/mixed-signal foundry, today announced that X-FAB has expanded its support to include Synopsys’ Galaxy Custom Designer™ implementation solution.
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| Nov 16, 2009 | Digital Imaging Systems Achieves First-pass Silicon Success with Synopsys Galaxy Custom Designer
Demanding AMS Project Design and Tapeout Schedule Met in 22 Days
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| Sep 01, 2009 | Ubixum Achieves Product-Ready Design at First Silicon with Synopsys Galaxy Custom Designer Solution
Synopsys, Inc. today announced that Ubixum has used Synopsys' Galaxy Custom Designer™ implementation solution to successfully design its latest advanced image sensor chip.
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| Jul 24, 2009 | Synopsys Introduces Galaxy Constraint Analyzer to Improve Designer Productivity
Speeds RTL-to-GDSII Turnaround Time Through Look-ahead Constraint Analysis
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| Jul 20, 2009 | Synopsys Introduces IC Compiler In-Design Rail Analysis to Accelerate Design Closure
Synopsys, Inc., today introduced its In-Design Rail Analysis™ capability to accelerate design closure. Part of Synopsys' IC Compiler in-design ecosystem, In-Design Rail Analysis utilizes embedded PrimeRail analysis and fixing guidance technology to enable designers to easily perform power network verification throughout physical implementation.
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| Jun 09, 2009 | TSMC Selects Synopsys Galaxy Implementation Platform for Integrated Sign-off Flow
Synopsys, Inc., a world leader in software and IP for semiconductor design and manufacturing, today announced that TSMC selected Synopsys' Galaxy™ Implementation Platform for their new Integrated Sign-Off Flow. The RTL-to-GDSII design flow deploys the advanced optimization technologies of Synopsys' Design Compiler® synthesis and IC Compiler physical implementation solutions, and the PrimeTime® sign-off and Star-RCXT™ extraction solutions - the industry yardsticks for IC design sign-off. The new flow is now available for 65-nanometer (nm) designs with planned extensions into other process technology nodes.
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| Jun 02, 2009 | SMIC Deploys Synopsys HSPICE Simulator for 45-nm Physical IP and Standard Cell Development
HSPICE 2009.03 Delivers 2x Speed-up and Improved Silicon Correlation
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