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Fairchild Achieves First-Pass Silicon Success Using DesignWare USB 2.0 nanoPHY IP and Meets Project Schedule for Next-Generation USB 2.0 Transceiver SoC |
"To meet our critical time-to-market window, we selected Synopsys, an established IP vendor with known expertise and who would give us the best opportunity of achieving first-pass silicon success." Jerry Johnston,
Sr. Director of Switch and Interface,
Fairchild Semiconductor |
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eRide Achieves First-Pass Silicon Success for High-Sensitivity GPS SoC with DesignWare IP for the AMBA Interconnect |
"Using Synopsys' silicon-proven DesignWare IP for AMBA allowed us to accomplish a tremendous amount of work with minimal resources and achieve first-pass success. We would not have met our project schedule without it." Thomas O'Connell,
Senior Logic Designer,
eRide |
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AMIMON Achieves First-Pass Silicon Success for High-Definition Wireless Video and Audio SoC with DesignWare DDR2 IP |
"Synopsys' silicon-proven DesignWare DDR IP eliminated the risk of integrating the DDR2 interface into the AMN 2220 chip and enabled us to meet our power, area and performance requirements." Ofer Peer,
Director of VLSI,
AMIMON |
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Zenverge Achieves High-Performance Requirements for Advanced Media Transcoder SoC with DesignWare DDR IP |
"Achieving memory performance was critical to our success. Synopsys provided us with a silicon-proven and flexible DDR2/3 IP solution that easily met our memory bandwidth requirements." Kent Goodin,
Vice President of Engineering,
Zenverge |
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K-Micro Meets High-Performance Requirements for Home Networking SoCs with DesignWare Data Converter IP |
We needed an IP vendor who understood the IP business, had technical expertise and would be there to support our product roadmaps as we migrated to different process technologies. Synopsys was our choice. Tommy Aizawa,
Vice President for Strategic Marketing,
Kawasaki Microelectronics |
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Netronome Selects Synopsys’ DesignWare DDR Controller and PHY IP for High-Performance Network Processor SoC |
"Synopsys’ high-quality DesignWare DDR3/2 IP is easy to integrate and includes all the required features including per-bit deskew capabilities, full write-leveling and DIMM support.” Chunli Cai,
Senior Principal Engineer,
Netronome |
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Ambarella Delivers Innovative Hybrid Camera SoC Platform with High-Quality DesignWare USB and Ethernet IP |
"Synopsys’ DesignWare USB and Ethernet IP products are clearly the best solutions in the market, providing the lowest power and smallest area compared to other offerings we evaluated.” Chan Lee ,
Vice President of Engineering,
Ambarella |
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GUC Delivers Low Power, High-Performance Solid State Drive SoC Platform with DesignWare SATA IP |
"With a very aggressive time- to-market window, Synopsys’ high-quality, silicon-proven SATA IP solution enabled us to achieve first-pass success and meet our project schedule. Synopsys’ DesignWare IP is definitely a brand we can trust." Richard Tseng,
Product Manager,
Global Unichip Corporation |
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Synopsys’ DesignWare® IP Helps STMicroelectronics Speed Time-to-Market for STM32 Connectivity Line of SoCs |
"We evaluated IP vendors based on feature set, technical support and maturity of the IP. Synopsys came out ahead in all three areas. They provided us with high quality, fully verified IP solutions that enabled us to focus our efforts on the differentiated portions of our design.” Ludovic Ruat,
Digital IP Design Manager,
Microcontrollers Division |
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Complete DesignWare IP Solutions Enable ViXS to Achieve First Pass Silicon Success for Advanced Video Processing SoC |
"The combination of ViXs' design expertise in high performance video ICs and Synopsys' unmatched quality and breadth of IP portfolio allowed us to show working samples to our customers within two weeks of receiving the chip back from the fab."
Kuldip Sahdra,
Director of ASIC Engineering,
ViXS |
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ChipWrights Achieves First-Pass Silicon Success and Meets Aggressive Schedule with High-Quality DesignWare USB and Ethernet IP |
"We did not have a very good experience with our last IP vendor and were not going to make the same mistake twice. With an aggressive project schedule, we wanted to go with the best and most reliable IP vendor in the industry, a blue-chip vendor, and that was definitely Synopsys.” Cary Robins,
President,
ChipWrights |
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DesignWare IP for PCI Express Helps Alereon Speed Time-to-Market for Worldwide Wireless USB Chipset |
"After evaluating other IP vendors on ease of use, quality, and completeness of deliverables, Synopsys was the clear winner in all areas. As an established leader in PCI Express IP, we knew it was the lowest risk solution for us." Dr. David Shoemaker,
Vice President of Engineering and Operations,
Alereon |
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Sequans Utilizes DesignWare USB 2.0 PHY IP to Deliver Low Power and High Performance SoC for WiMAX Mobile Stations |
"Faced with an extremely tight time to market window, we chose Synopsys DesignWare USB 2.0 PHY IP to help us meet our aggressive project schedule and low power consumption requirements."
Laurent Sibony,
Director of ASIC Designs,
Sequans Communications |
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Euphonic Technologies Achieves First Pass Silicon Success with High-Quality DesignWare IP for PCI Express |
"After evaluating other IP vendors, Synopsys provided us with the most comprehensive, silicon-proven IP solution including digital controllers and PHY, which met our power and performance requirements." Shinji Masuda,
Vice President of Engineering,
Euphonic Technologies |
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DesignWare PHY IP Saves Two Man Years of Engineering Effort for 10GBASE-T Copper Transceiver |
"Faced with a critical time to market window, we turned to Synopsys because they provided a XAUI PHY that had the best feature set compared to other vendors, was silicon proven and well established in the market." Mike McConnell,
Co-Founder,
KeyEye Communications |
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Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds Time-to-Market for Stretch |
"We were facing a very limited market window and the DesignWare IP for PCI Express enabled us to tape-out on schedule with timing closure, and achieve first-pass silicon success." Phil Lowe,
Director of ASIC,
Stretch |
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DesignWare Verification IP with the VMM Methodology Shortens Testbench Development Time for DSP Group |
"Using the VMM for SystemVerilog saved us months on development time. Having DesignWare Verification IP, which supported this methodology, was also critical for this project." Dany Brown,
Verification Team Leader,
DSP Group |
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Silicon-Proven DesignWare USB 2.0 PHY IP Lowers Risk and Enables First Pass Silicon Success for Hisilicon Technologies |
"Time-to-market was a top priority for us. With the DesignWare USB 2.0 PHY IP, we were able to achieve first pass silicon success and meet our project schedule." Jason Chao,
Senior Director,
HiSilicon Technologies |
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Leading DesignWare IP for PCI Express Helps AGEIA Achieve High Performance Goals for Game Physics Processor |
"After careful analysis, we found that the DesignWare IP for PCI Express provided us with the latency, throughput and feature requirements that we needed." Otto Schmid,
Vice President of Hardware Engineering,
AGEIA |
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High Quality DesignWare Verification IP |
"Synopsys' proven DesignWare Verification IP gave us a huge schedule advantage by enabling us to develop the verification environment in just three months versus the six in our previous project." Samir Patel,
Sr. Design and Verification Engineer,
Tarari |
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High Quality IP Saves Open-Silicon Three Months on Schedule |
"In selecting an IP supplier we look at quality, features and support. Synopsys came out on top in all three areas by providing production-proven and certified IP with the required set of features." Hans Bouwmeester,
Director of IP,
Open-Silicon |
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High Quality, Great Support and Latest Feature Set Made DesignWare IP the Right Choice for Cavium Networks |
"Above all we need IP that we can trust, and Synopsys has proven its trustworthiness to us." Anil Jain, ,
Vice President of IC Engineering,
Cavium Networks |
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Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lowers Area for Ralink Chipset |
“Lowering the power consumption for our chipset was our main goal. Synopsys provided us with a complete, PCI Express IP solution that helped us deliver a product that is extremely competitive in both power and area.” Rick Jeng,
Executive Vice President,
Ralink |
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Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success |
"We received first samples in early December, and immediately had critical high-speed interconnect IP and processor cores running successfully. Within another week, our most complex logic was fully operational." Maher Fahmi,
VP Silicon Engineering,
Teradici |
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