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Chip Design: A New Generation of Audio/Video Coming to a Network Near You
Aug 26, 2010

Electronics Weekly: Synopsys says it is vital to test IP for SoCs
Jun 04, 2010

Chip Design: Does Wireless Communication Drive the Evolution of Data Converters?
May 26, 2010

DAC.com: Tested and Tried: The Right Way to Evaluate Your IP Vendor
May 12, 2010

ChipEstimate.com: Using PCI Express for I/O Virtualization
May 11, 2010

Tech Talks on EDA Confidential: Is there such a thing as analog IP?
May 03, 2010

EDA DesignLine: Integrating analog video interface IP into SoCs delivers superb image quality (Part II)
Apr 29, 2010

ChipEstimate: DesignWare DDR3/2 PHY - Requirements for Implementing High Data Rates Using Wire-Bond BGA Packaging
Apr 20, 2010

EDA DesignLine: Integrating analog video interface IP into SoCs delivers superb image quality (Part I)
Apr 07, 2010

One-stop shop provides easy-to-use USB 3.0 IP
Mar 04, 2010

Nikkei Electronics Asia: 1.066Gbps Signal Throughput in DDR3 with 4-Layer Boards
Dec 20, 2009

Chip Design: Adopting New Design Techniques in Analog IP to Optimize Power and Performance in Consumer Electronics
Dec 09, 2009

Chip Design: When It Comes To Intellectual Property, Size Matters
Nov 19, 2009

EDA DesignLine: The best of both worlds: Optimizing OCP slave memory behavior
Nov 09, 2009

Chip Design: Verifying USB 3.0 designs - it’s all about the integration
Oct 27, 2009

EDN: IP Quality Lies Beyond Compliance Testing
Oct 08, 2009

Chip Design: HDMI 1.4 - All Set to Take Over the Mobile World!
Sep 23, 2009

EDN Blog: Sometimes low-power design means picking the right IP
Jul 23, 2009

Chip Design: DDR Memory Interfaces - Addressing the Forgotten Bus
Jul 21, 2009

Electronic Design: A Summary Of The DDR Memory Controller Standard—Wait, There Isn’t One!
Aug 14, 2008

EDA DesignLine: Low Power Design for Analog/Mixed-Signal IP
Mar 04, 2008

Chip Design: Certified Wireless USB and Ultra-wideband to the Rescue
Aug 15, 2007

EETimes: Letter to the Editor: Synopsys Weighs In
Aug 14, 2007

EETimes: Analog and Mixed-Signal Connectivity IP at 65nm and Below
May 07, 2007





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