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|  Synopsys and Stretch | “We were facing a very limited market window and the
DesignWare IP for PCI Express enabled us to tape-out
on schedule with timing closure, and achieve first-pass
silicon success.”
Phil Lowe,
Director of ASIC,
Stretch |
| | Synopsys and AGEIA | Leading DesignWare IP for PCI Express Helps Achieve
High Performance Goals for Game Physics Processor
Otto Schmid,
Vice President of Hardware Engineering,
AGEIA |
| | Synopsys and Open-Silicon | “In selecting an IP supplier we look at quality, features, and support. Synopsys came out on top in all three areas by providing production-proven and certified IP with the required set of features. We also appreciated the responsiveness of the expert support team, who was there for us every step of the way.”
Hans Bouwmeester,
Director of IP,
Open-Silicon |
| | Synopsys and Hisilicon Technologies | “Time-to-market was a top priority for us. With the
DesignWare USB 2.0 PHY IP, we were able to achieve
first pass silicon success and meet our project schedule.”
Jason Chao,
Senior Director,
HiSilicon Technologies |
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