| Aug 25, 2010 | Synopsys DesignWare SATA IP Enables First-Pass Silicon Success for Global Unichip Corporation
High-Quality DesignWare IP Helps Deliver New Low Power, High-Performance GP5080 Solid State Drive SoC for Storage Applications
|
|
| Aug 24, 2010 | Synopsys Announces Immediate Availability of DesignWare MIPI M-PHY IP in 40-nm Process Technology
DesignWare DigRF v4 Controller and M-PHY IP Address Demand for Higher Throughput in LTE and WiMAX Mobile Devices
|
|
| Aug 12, 2010 | Synopsys Launches DesignWare USB Software Alliance Program
Alliance Program Enables Faster Implementation of USB Connectivity with Interoperable, Ready-to-Go Software Drivers and Services
|
|
| Aug 04, 2010 | Synopsys and GLOBALFOUNDRIES to Develop DesignWare Interface PHY IP for 28-nanometer Technologies
Collaboration Enables Faster Time-to-Volume for Advanced High-Performance SoC Designs
|
|
| Jul 28, 2010 | Synopsys First to Deliver High-Performance Audio IP in 40-nm and 55-nm Process Technologies
Low Power, Compact and Highly Modular DesignWare 96 dB Hi-Fi Audio IP Enables Easy Integration into a Broad Range of SoC Applications
|
|
| Jul 07, 2010 | Open-Silicon Integrates 50 DesignWare Interface and Analog IP Products with 100 Percent Silicon Success
High-Quality, Fully Verified IP and Longstanding Relationship Between the Two Companies Accelerates Time-to-Market for Open-Silicon's Customers
|
|
| Jun 23, 2010 | Media Advisory/Alert: Synopsys Demonstrates Interoperability of DesignWare IP for PCI Express 3.0 at PCI-SIG Developers Conference
|
|
| May 13, 2010 | Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC’s 65 Nanometer LL Process Technology
Silicon-Proven DesignWare PHY IP Lowers Risk and Enables Easy Integration into SOCs
|
|
| May 05, 2010 | Synopsys Unveils Ethernet Controller IP With New Audio Video Bridging Feature
DesignWare Ethernet QoS Controller Enables Efficient Streaming of 802.1 Audio and Video Applications
|
|
| May 03, 2010 | Synopsys Launches Industry’s First MIPI® DigRF(SM) v4 IP
DesignWare IP Accelerates Development of LTE and WiMAX SoCs
|
|
| Apr 29, 2010 | Synopsys Wins Multiple EDN Innovation Awards
Recognition of DesignWare SuperSpeed USB 3.0 IP and IC Validator Underscores Technology Leadership
|
|
| Apr 28, 2010 | New Synopsys Universal DDR Controllers Improve Performance and Reduce Cost of Embedded DRAM Interfaces
DesignWare Universal DDR Protocol and Memory Controllers Feature a DFI 2.1-compliant Interface and Support for DDR2, DDR3, Mobile DDR and LPDDR2 Standards
|
|
| Apr 19, 2010 | Synopsys Introduces the HAPS-60 Series of Rapid Prototyping Systems
Next-generation systems deliver highest performance, highest capacity, pre-tested IP and unique advanced verification functionality
|
|
| Apr 14, 2010 | Synopsys Expands IP OEM Partner Program with Two New Members
Companies Select Broad Portfolio of High-Quality DesignWare IP as Preferred Solution for SoC Designs
|
|
| Apr 14, 2010 | eSilicon Joins Synopsys' IP OEM Partner Program
eSilicon's Value Chain Producer Model Combined with Synopsys' High-Quality IP and Excellent Technical Support Speeds Time-to-Market for SoC Designs
|
|
| Apr 07, 2010 | Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards in a Single PHY
New DDR multiPHY Allows One Chip to Target Multiple Applications
|
|
| Mar 31, 2010 | Synopsys' DesignWare SuperSpeed USB 3.0 IP Receives USB-IF Certification
Fully integrated DesignWare IP Lowers Design Risk and Enables Interoperability of USB 3.0-Enabled Products
|
|
| Jan 28, 2010 | Synopsys Showcases Silicon-Proven DesignWare IP Solutions for SuperSpeed USB 3.0, DDR and PCI Express at DesignCon 2010
|
|
| Jan 27, 2010 | Synopsys Offers Designers Many Opportunities for Design Success at EDSFair
Engineers to Learn About the Latest Technology Developments in Design, IP and Manufacturing Solutions
|
|
| Jan 25, 2010 | Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies
IP Supports HDMI Ethernet and Audio Return Channel, 3D Formats, Real-Time Content Signaling, 4K x 2K Resolution Mode, and 10.2 Gbps Aggregate Bandwidth
|
|
| Jan 25, 2010 | Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions
Silicon-Proven 3G DigRF, CSI-2 Controller and D-PHY Accelerate Development of Mobile Devices
|
|
| Jan 13, 2010 | Synopsys Announces DesignWare Protocol Analyzer for Verification of SuperSpeed USB 3.0-based Designs
New Verification IP Capability Speeds Time-to-Market by Simplifying Debug of USB 3.0 Interfaces
|
|
| Nov 24, 2009 | Synopsys Expands DesignWare Data Converter IP Portfolio with 40-nm Solutions
|
|
| Oct 29, 2009 | Synopsys Unveils 30 Percent Smaller Area, Low Power USB 2.0 PHY IP for 28-nm Processes
Connectivity IP Leader Continues to Innovate with the DesignWare USB 2.0 picoPHY - The First PHY IP to Support USB 2.0 Battery Charging v1.1 and OTG 2.0 Specifications
|
|