This questionnaire is intended to assist Synopsys to aid in the success of the users of the Verilog-based DesignWare® IBM PowerPC PLB4 CoreConnect Peripherals Design View corekit.
Qualified DesignWare Library licensees who complete and submit this questionnaire will receive the Design Views for the PowerPC PLB4 CoreConnect Peripherals at no additional charge. The Design Views include simulation and timing models, in addition to product documentation.
The Implementation View for the core, including the RTL, is available for an additional fee. If you are interested in licensing the Implementation Views, please contact Michael McGinnis, PowerPC Licensing & Enablement at mmcginni@us.ibm.com, or contact the DesignWare team.
- The PowerPC PLB4 CoreConnect Peripherals Design View corekit includes the following:
- CoreConnect Bus Components
- PLB4ARB8M – PLB4 Arbiter 8 Masters 128 bit
- PLB4ARB12M2W - PLB4 Arbiter (12 Masters; 2-Way)
- PLB43PERFMON – PLB4 Performance Monitor
- PLB4XAHB Bridge – Bi-directional PLB4 to AMBA 2.0 AHB Bridge - Peripherals
- UIC – PLB4 Universal Interrupt Controller
- DMA2PLB4 – PLB4 DMA Controller
- PCIXS2PLB4 – PCI-X to PLB4 Bridge - Memory/Cache Controllers
- PPC440L2 – PowerPC 440 L2 Cache Controller
- DDR2MC1632B2PLB4 – PLB4 DDR 1/2 Controller
- SRAMMC2PLB4 – PLB4 SRAM Controller
- Minimum system requirements to install the Design View coreKit are:
- DesignWare License
- HDL Simulator License
- 750MB available disk space for installation
- 1GB available swap space
- 512MB RAM (physical memory) recommended
If you have any questions about the DesignWare IBM PowerPC PowerPC PLB4 peripheral Design Views or Implementation Views, please contact the DesignWare team. If you have application or architectural questions about the PowerPC PLB4 peripherals, please contact Michael McGinnis, PowerPC Licensing & Enablement at mmcginni@us.ibm.com.