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Synopsys partners with industry leading foundries to provide designers with easily accessible, silicon proven standard cells, I/Os and memories, which are optimized for their process technology. By working together to ensure tight integration of the foundry libraries and Synopsys flows, we are able to offer a complete path from RTL to GDSII. All the views required to enable a state-of-the-art implementation and verification flow are available to all DesignWare Library licensees at no additional cost. This unique combination of libraries, proven methodology, high quality standards and industry-leading IP technical support will help reduce design risk and accelerate time to market.
| | Standard cells, I/Os and memory compilers optimized for Chartered's 0.35um, 0.25um, 0.18um and 0.13um process offerings. Chartered Libraries Datasheet |
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