INTERNATIONAL
|
SOLVNET
Home
Company
Press Releases
Press Releases
The press releases are listed in chronological order and are archived by year.
Get News Alerts by Email
/
RSS Feeds
Archives:
2009
/
2008
/
2007
/
2006
/
2005
/
2004
/
2003
Nov 05, 2009
Synopsys Chosen by Realtek as Its Primary EDA Partner
Nov 03, 2009
Synopsys TetraMAX ATPG Cuts Test Development Schedule at Arrow Electronics
Multicore Processing Speeds Runtime by 3X, Accelerates Time-to-Quality
Nov 02, 2009
Media Advisory/Alert: Synopsys EDA Interoperability Forum to Feature Subodh Bapat Keynote on Green Computing
Topics include System-Level Design, VMM Verification Methodology and a multi-tool IPL Flow Demonstration
Nov 02, 2009
Synopsys Extends DFTMAX Compression to Reduce the Cost of Pin-Limited Test
Delivers predictable high compression with only one pair of test data pins
Oct 30, 2009
Juniper Chooses Synopsys as Its Primary EDA Partner
Oct 29, 2009
Synopsys Unveils 30 Percent Smaller Area, Low Power USB 2.0 PHY IP for 28-nm Processes
Connectivity IP Leader Continues to Innovate with the DesignWare USB 2.0 picoPHY - The First PHY IP to Support USB 2.0 Battery Charging v1.1 and OTG 2.0 Specifications
Oct 28, 2009
Synopsys Announces 40th DesignWare Audio Codec IP
Broad DesignWare Audio IP Portfolio Shipped in More Than 100 Million Units
Oct 28, 2009
NVIDIA Adopts Synopsys Yield Explorer to Reduce Time to Volume
Design-centric yield management enables product engineers to achieve rapid yield ramp and provide cost-effective yield control in volume production
Oct 26, 2009
Freescale and Synopsys Announce Multi-year Strategic Collaboration Agreement to Increase Verification Productivity
Collaboration Builds on Years of Successful Deployment of Synopsys Verification Solution
More Releases
Seminar Series 2009
Attend a Synopsys technical seminar near you
Webinars
View our online webinars and learn from technology experts on a variety of topics.
SNUG Conferences
Forum for Synopsys users to exchange, discuss and explore ideas
Workshop Series 2009
Hands-on learning from Synopsys experts
News
Synopsys Chosen by Realtek as Its Primary EDA Partner
Synopsys TetraMAX ATPG Cuts Test Development Schedule at Arrow Electronics
Media Advisory/Alert: Synopsys EDA Interoperability Forum to Feature Subodh Bapat Keynote on Green Computing
Synopsys Extends DFTMAX Compression to Reduce the Cost of Pin-Limited Test
Juniper Chooses Synopsys as Its Primary EDA Partner
Synopsys Unveils 30 Percent Smaller Area, Low Power USB 2.0 PHY IP for 28-nm Processes
Synopsys Announces 40th DesignWare Audio Codec IP
NVIDIA Adopts Synopsys Yield Explorer to Reduce Time to Volume
Freescale and Synopsys Announce Multi-year Strategic Collaboration Agreement to Increase Verification Productivity
More
Blogs
Low Power Blog: Magic Blue Smoke
A View from the Top: A System-Level Blog
AMS Verification Blog: Analog Insights
On Verification: A Software-to-Silicon Verification Blog
Standards Blog: The Standards Game
USB IP Blog: To USB or Not to USB
The Eyes Have it: An IP Blog
More
Webinars
Simulation of Advanced Semiconductor Devices Including High-k/Metal-gate Transistors and FinFETs
The Recipe for Successful Formal Verification: Proper Constraining of Your Design
StarRC Custom Extraction for Custom IC Design
Automotive Electronics Reliability: A Software to Silicon Methodology
HSPICE/Custom Designer for Analog & RF Circuit Design
Front-to-Back AMS Flow using Custom Designer
Stratix-based Algorithm Acceleration Prototyping
More
Events
CEA 861/HDCP PlugFest13
SDR’09 (Software Defined Radio)
IEDM (International Electron Devices Meeting)
EMLC (European Mask & Lithography Conference)
DesignCon 2010
Advanced Lithography 2010
DVCon 2010
More
Press Room
Investor Relations
About Synopsys
Office Locations
Publications
© 2009 Synopsys, Inc. All Rights Reserved.
Contact us
|
Locations
|
Privacy
|
Legal
|
RSS