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Seminar Series 2009
Attend a Synopsys technical seminar near you
Webinars
View our online webinars and learn from technology experts on a variety of topics.
SNUG Conferences
Forum for Synopsys users to exchange, discuss and explore ideas
Workshop Series 2009
Hands-on learning from Synopsys experts
News
Digital Imaging Systems Achieves First-pass Silicon Success With Synopsys Galaxy Custom Designer
Synopsys and King Abdulaziz City of Science and Technology (KACST) Sign Agreement to Promote Knowledge-Based Society in Saudi Arabia
Synopsys Announces Earnings Release Date and Conference Call for Fourth Quarter and Fiscal Year 2009
Synopsys Chosen by Realtek as Its Primary EDA Partner
Synopsys TetraMAX ATPG Cuts Test Development Schedule at Arrow Electronics
Media Advisory/Alert: Synopsys EDA Interoperability Forum to Feature Subodh Bapat Keynote on Green Computing
Synopsys Extends DFTMAX Compression to Reduce the Cost of Pin-Limited Test
Juniper Chooses Synopsys as Its Primary EDA Partner
Synopsys Unveils 30 Percent Smaller Area, Low Power USB 2.0 PHY IP for 28-nm Processes
More
Blogs
Low Power Blog: Magic Blue Smoke
A View from the Top: A System-Level Blog
AMS Verification Blog: Analog Insights
On Verification: A Software-to-Silicon Verification Blog
Standards Blog: The Standards Game
USB IP Blog: To USB or Not to USB
The Eyes Have it: An IP Blog
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Webinars
Simulation of Advanced Semiconductor Devices Including High-k/Metal-gate Transistors and FinFETs
The Recipe for Successful Formal Verification: Proper Constraining of Your Design
StarRC Custom Extraction for Custom IC Design
Automotive Electronics Reliability: A Software to Silicon Methodology
HSPICE/Custom Designer for Analog & RF Circuit Design
Front-to-Back AMS Flow using Custom Designer
Stratix-based Algorithm Acceleration Prototyping
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Events
SDR’09 (Software Defined Radio)
IP/ESC'09 (Embedded Systems Conference)
IEDM (International Electron Devices Meeting)
EMLC (European Mask & Lithography Conference)
DesignCon 2010
SPIE Advanced Lithography
DVCon 2010
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Press Room
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About Synopsys
Office Locations
Publications
A
AMBA
AMS Co-Sim
Audio IP
C
Cadabra
CATS
Certify
CHIPit.com
Circuit Check
Confirma
coreAssembler
coreBuilder
coreConsultant
Custom Designer LE
Custom Designer SDL
Custom Designer SE
CustomSim
D
Data Converters
Datapath
DC Ultra
DDR
Design Compiler Graphical
Design Services
DesignWare
DesignWare System-Level Library
Device Controller
DFTMAX
DSP model libraries
E
Eclypse Low Power Solution
ESP-CV
Ethernet
F
Fammos TX
Formality
FPGA Design
G
Galaxy Constraint Analyzer
H
HAPS
HDMI IP
Hercules
HSIM
HSIM Plus
HSPICE
I
I2C
IC Compiler
IC Validator
IC Workbench Plus
Identify
Identify Pro
Implementation
Innovator
Interconnect Simulation
IP
J
JPEG
L
Leda
Liberty NCX
Lynx Design System
M
Magellan
Manufacturing
Memory Models
Microcontrollers
Mobile Storage
MVRC Multi-voltage Rule Checker
M
MVSIM
N
NanoSim
NanoTime
O
OCP
Odyssey
P
PCI Express
PCI/PCI-X
Pioneer-NTB with Vera
Power Compiler
PrimeRail
PrimeTime
PrimeYield
Process Simulation
Proteus
Proteus MetroKit
PSM-Check and Create
R
Raphael
Raphael NXT
S
Saber
Saber Harness
Saber Simulator
SATA
Seismos CX
Seismos LX
Sentaurus Device
Sentaurus Lithography
Sentaurus Process
Sentaurus Topography
Serial I/O
Signoff
SiVL
SpiceCheck
SpiceExplorer
SRAMs
Star IP
StarRC
Synplify DSP
Synplify Premier
Synplify Pro
System Level Library
System Studio
T
Taurus-Medici
Taurus-TSuprem4
TCAD
TetraMAX ATPG
Touch Screen Controllers
U
USB
V
VCS
VCS Verification Library
Verification
Verification IP
Video Analog Front Ends
Virtual Platforms
W
WaveView Analyzer
Wireless USB
X
XA Technology
XAUI
Y
Yield Explorer
Z
Zroute
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