Through our Curricula Advisory Board, Synopsys works closely with a team of academic experts to develop microelectronic design curriculum for Synopsys University Program members. Each full-semester course contains 15 weeks of material including syllabus, lectures, labs, home work and exams. Synopsys tools are used and applied in each lab for a thorough and practical understanding of theoretical concepts introduced in each of these courses. This courseware can be used as a new course or to supplement content in an existing course as needed.
Synopsys also offers curriculum support modules which vary in length and include more lectures and Synopsys tool training materials than the full-semester courseware.
All courseware described below may be downloaded from the Synopsys University Program Member Only website (requires SolvNet ID and password). If you are not yet a member of the Synopsys University Program, but want to know more, please contact the program administrator for your region.
| Full Semester Courseware |
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- Digital System Architecture and Design:
Bachelor Degree Courses:
- Basics of Physical Design: Netlist to GDSII
- Digital ASIC Design
- Digital Integrated Circuits
- IC Design
- IC Design Flow – New!
- IC Design Introduction
- IC Simulation Theory
- IC Testing (EPFL)
- IC Testing (SEUA)
- Introduction to Circuits
- Introduction to Logic Design
- I/O Design
- Logic Design
- Synthesis of Digital Circuits
Master's Degree Courses:
- Advanced IC Physical Design
- Crosstalk and Noise
- Design for Test
- Design of Special I/Os
- Digital Signal Processing
- Digital VLSI Design
- Low Power Design
- Low Power Methodology - Updated!
- Modeling and Optimization of VLSI Interconnects
- Modeling and Verification with SystemVerilog
- System-on-Chip Architecture Design
- VLSI Design
- VLSI Design Verification and Testing
- VLSI Physical Design Algorithms
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- Analog/RF Design:
Bachelor Degree Courses:
- Analog Integrated Circuits
- Analog Integrated Circuit Design
- Introduction to RF Communication
- RF Circuits and Systems
Master's Degree Courses:
- Mixed Signal IC Design
- RF IC Design
- IC/Semiconductor Fabrication:
Bachelor Degree Courses:
- Principles of Semiconductor Devices
- Semiconductor Devices (SAED)
- Semiconductor Technology
- VLSI Device and Process Simulation
- Other:
Bachelor Degree Courses:
- Computer Architecture - Updated!
- EDA Introduction
- EDA Mathematical Methods
- Linear Algebra
- Microprocessor Systems
- Numerical Methods
- Probability Theory
- Technical Writing
Master's Degree Courses:
- Complex Functions
- Databases
- Embedded Systems Design
- Fourier Transformations
- Fuzzy Logic
- Rad-hard IC Design
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| Curriculum Support Modules: Workshops and Lectures |
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- Implementation:
- Design-For-Test Concepts for ASIC Designs
- Synopsys Implementation Flow
- Verification:
- Digital Design Using SystemVerilog
- Mixed Signal IC Verification with Verilog-AMS - New!
- SystemVerilog Testbench
- SystemVerilog RVM
- SystemVerilog Assertions
- Verification with Verification Methodology Manual for Low Power
(VMM-LP) - New!
- Verilog HDL Basics
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- Other:
- 90nm Digital Design Workshop
- ASIC Design Flow Tutorial Using Synopsys Tools
- Full Custom IC Design Flow with Cosmos Tools
- IC Fabrication
- Project Management
- Synopsys IC Design Flow Based on 90nm Generic Library (SAED 90nm EDK) – New!
- Synplify Pro
- TCAD Course
- TCAD Quick Start Guide - Updated!
- UPF Workshop
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| Short Lectures/Labs |
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- Circuit Simulation:
- Circuit Simulation: Transient Analysis
- Techniques for Circuit Simulation
- DSP/FPGA:
- Advanced FPGA Synthesis using Synplify Pro and Synplify Premier
- Synplify DSP
- Low Power Design:
- A Structured Methodology for Verifying Low Power Designs
- Power Intent and Unified Power Format (UPF)
- Synopsys Advanced Low Power Design Methodology
- Verification Methodology Manual for Low Power (VMM-LP)
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- OpenSPARC:
- Multi-threaded SPARC core verification using SystemVerilog Testbench - New!
- Synthesizing a Design using the 90nm Technology Library
- Other:
- Advanced RTL Verification Techniques
- Basic Perl Programming
- Power-Performance Optimization of Digital Circuits and Systems
- Process Variation Aware Design
- Signal and Power Integrity: Current state and new approaches
- Statistical Techniques for Timing Analysis: Current State and Trends
- TCAD Microelectronic Labs (IIT)
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| Tool Training |
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- * FPGA:
- Advanced FPGA Synthesis using Synplify Pro and Synplify Premier
- Advanced FPGA Debugging with the Identify Tool
- * ASIC Prototyping:
- ASIC Prototyping with the Certify® Tool
- * DSP:
- Advanced Algorithm Implementation with Synplify DSP
* Requires SolvNet ID and password. |
- Training Kits: (Purchase required)
- Synplicity IEEE-1364 Verilog University Kit
- Synplicity IEEE-1076 VHDL University Kit
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