Innovation Optimized!

32nm Enablement Collaboration
Synopsys, the Common Platform and ARM have announced a new collaboration to develop and deliver a technology enablement solution for the design and manufacture of mobile internet devices at 32nm. This complete design chain collaboration of technology would integrate the following components:

• ARM® high-performance, low-power processor architecture for mobile applications, and optimized suite of physical intellectual property (Physical IP)
• 32/28-nanometer (nm) low-power/low-leakage, high-k metal-gate (HKMG) synchronized foundry services through the Common Platform manufacturing alliance of IBM, Chartered and Samsung
• Synopsys Lynx Design System, including Galaxy™ Implementation Platform for SoC implementation, as well as its DesignWare® connectivity IP

Watch the 32nm Collaboration Video – Innovation Optimized! ARM, Common Platform and Synopsys executives share their views on the recent collaboration announcement: Dr. Aart de Geus, Chairman of the Board and CEO, Synopsys Michael Cadigan, General Manager, Microelectronics Division, IBM Systems and Technology Group Dr. C.S. Choi, Executive Vice President, LSI Division, Samsung Electronics Chia Song Hwee, President and CEO, Chartered Semiconductor Manufacturing Warren East, Chief Executive Office, ARM Holdings

The Common Platform Partnership
Chartered, IBM, and Samsung have joined together to establish a new flexible semiconductor foundry model known as the Common Platform Partnership. Combining expertise from
each company, they have jointly developed a family of leading-edge CMOS process technologies and advanced manufacturing capabilities. By sharing a common set of design rules and manufacturing processes, designs are created once and can be manufactured at any single foundry or at any combination of them. The Common Platform Overview provides more details about this new approach to the foundry market.

Synopsys has collaborated with each of the Common Platform companies for many years. When the Common Platform partnership was formed it was only natural that they extend their successful Synopsys relationships to the new effort.

Collaboration Benefits
You benefit from the collaboration between Chartered, IBM, Samsung and Synopsys in several ways:

• Reference Flows
  Synopsys has worked with the Common Platform companies and ARM's Artisan Physical IP Division to develop, test, and deliver complete reference flows that allow you to transform your RTL into foundry-ready GDSII.
  • Please see the Common Platform Reference Flow page for more details.
  • The 45nm low power reference flow offers a comprehensive design flow built around Synopsys' Eclypse™ Low Power Solution and the widely adopted Unified Power Format (UPF) language, using the latest technology files from the Common Platform™ foundries and ARM® Physical IP standard cells, I/Os, memories and the Power Management Kit for the CMOS11LP process. For more detail, please see:
    45nm Reference Flow Announcement
  • The 65nm reference flow adds 65nm capabilities to the design flow, including improving manufacturability using the critical area reduction capabilities of IC Compiler™ using foundry-supply defect data. A variety of new 65nm specific design rules are incorporated into place and route and physical verification (DRC) tools. For more details, please see the
    65nm Reference Flow Announcement
  • The 90nm reference flow is a complete RTL-to-GDSII design flow focused on quickly reaching design closure by simultaneously addressing power, timing, area, and signal integrity challenges. For more details, please see:
    90nm Reference Flow Announcement

  The reference flows were created by Synopsys Professional Services and independently validated by the Common Platform partners.

  The 45nm, 65nm and 90nm reference flows are available at no charge to Common Platform customers and can be requested using an on-line form in SolvNet.

• Connectivity IP
  The availability of IP blocks is critical for the rapid creation of the large designs that take full advantage of the Common Platform silicon technologies. In addition to a large library of synthesizable implementation IP and verification IP, Synopsys also provides a variety of high-value mixed signal connectivity IP for the 90nm and 65nm Common Platform processes. Optimized 65nm PHY interfaces are available for the USB 2.0 (Synopsys' small, fast nanoPHY), PCI Express, SATA and XAUI interface standards and the nanoPHY. Silicon-proven and Hi-Speed USB logo certified versions of the USB 2.0 nanoPHY are also available for the 90nm process. For more details, please see the
  65nm and 90nm IP Announcement
• Design Services
  Synopsys Professional Services combines application-specific design experience with in-depth knowledge of the Common Platform reference flow and silicon IP to assist your team in implementing your design in a Common Platform technology.

Click here to see detailed support information in the SVP Café for Chartered, IBM, and Samsung.