Mike Keating, Synopsys Fellow and co-author of the Low Power Methodology Manual and the Reuse Methodology Manual, will give his perspective on how SoC design will evolve over the next 3 to 5 years. This talk will focus on how power issues, design complexity, and semiconductor technology are re-shaping every aspect of chip design, from architecture definition to tapeout.
Mike Keating, Synopsys Fellow