System-on-Chip designs made by our customers are evolving into ‘Seas-of-Cores’, composed of many application-specific processors (ASIPs) with local memory and interconnect structures. By working with Synopsys, and integrating our ASIP design tools with Synopsys’ Virtualizer technology, our joint customers obtain a more complete ESL tool flow encompassing both virtual system-level modeling and debugging, architectural optimization, and ASIP-based software implementation. Virtualizer is the leading virtual platform solution. We are pleased to work with Synopsys in this field. - Gert Goossens, CEO of Target Compiler Technologies

Product Description
Target Compiler Technologies ASIPs (Application-Specific Processors) deliver greater computational efficiencies than merchant processors and more flexibility than fixed-function RTL designs. As such, they are the ideal technology to consider for performance and power sensitive design elements in next-generation SoCs – particularly where flexibility provides a key competitive advantage. Imagine being able to:

• Create differentiating IP that meets market demands for performance and power dissipation, yet is programmable from C
• Adjust performance sensitive algorithms without requiring silicon respins
• Enable your customer base to differentiate their products using their own proprietary algorithmic IP
• Reduce schedule risk and improve time to market

Interoperability Description and Customer Benefit
Target’s solutions represent a novel design paradigm to accelerate the design of application-specific processors (ASIPs). ASIP models created using IP Designer (a retargetable tool-suite for ASIP design) and IP Programmer (efficient SDKs for ASIP-based SoCs) can be used in Synopsys Virtualizer as processor models and application specific sub-systems. The interface is established using SystemC TLM-2.0 APIs.

Tell me more about Target Compiler Technologies and Virtualizer.

Flow Diagram