Synopsys' SystemVerilog Catalyst program promotes the development and use of EDA tools, verification IP, and training services which support the SystemVerilog standard language for design and verification.

Members of the SystemVerilog Catalyst Program may gain access to Synopsys’ tools, platforms, and solutions which support the SystemVerilog standard. This access allows development of products and services that are interoperable with Synopsys’ offerings while providing support for mutual customers.

Members

Ace Verification	Adveda	Alatek
Aldec	Aptix	ARM
Atrenta	Avery Design Systems	Beach Solutions
Blue Pearl Software	Bluespec	Cadence
Calypto	ChipVision Design Systems	ComputerBasedEducation
ControlNet India	Correct Designs, Inc.	Denali
Doulos	eInfochips, Inc.	Esterel Technologies
EVE	ForteLink Inc.	Free Model Foundry
GDA Technologies	HDLAB	IBEX Technology
Ingot Systems	IntelliProp, Inc	Interra Systems
Intrinsix	IPextreme	Jasper Design Automation
JEDA Technologies	J. van der Schoot Design Verification Consulting	Kacper Technologies Pvt Ltd
LOA Technology	N Square Corporation	nSys
Oki Network LSI	Paradigm Works	Perfectus Technology
PerfTrends	Posedge	Productivity Design Tools
Project VeriPage	Real Intent	Sequence
SiConcepts	Silicomotive Solutions	Silicon Interfaces
Silicon Vision	SONAC	SpringSoft
Sunburst Design	Sutherland HDL	Synapticad
Tenison EDA	Tharas Systems	TNI Valiosys
TransEDA	Trusster	Trustic
UV-Tech Consulting & Training	Veriez	Verific
Verification Technology	Verifore Inc.	Verilab
VeriSure Consulting	Veritools	VGVP
VhdlCohen Training	WHDL	WinterLogic Inc.
WSFDB Consulting	XtremeEDA Corporation	Zocalo Tech, Inc.